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Wednesday, March 15 • 10:00 - 10:15
Getting Started with RISC-V Custom Instructions - Jon Taylor, Imperas Software Ltd

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One of the attractive features of RISC-V is the ability to add, while maintaining ecosystem software support, new optimized instructions and extensions to a processor implementation. At first it appears as simple task to look at opportunities in the application code that could be accelerated with some dedicated new hardware. However, since hardware typically has a much longer life cycle than software, future updates and roadmap needs must be anticipated. Thus, the art of ISA design is using fine grain analysis to accelerate just the key steps while leaving sufficient flexibility to support new software updates and advances. Also, in multi-core arrays the use of custom extension can offer a lightweight communication channel between processors. This extends the scope beyond the processor itself into system design and analysis. This talk will illustrate the key profiling and analysis steps for custom extensions and optimization.

avatar for Jon Taylor

Jon Taylor

Director of Product Technology, Imperas Software
Jon Taylor has over 20 years of experience in the semiconductor industry, working in technical areas from CPU verification to embedded software, and commercial areas including field applications and technology strategy. He has worked on multiple architectures including Arm, RISC-V... Read More →

Wednesday March 15, 2023 10:00 - 10:15 CET
Hall 4A, Stand 4A-620
  • Slides Attached Yes